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EL7515
Data Sheet August 10, 2007 FN7120.2
High Frequency PWM Step-Up Regulator
The EL7515 is a high frequency, high efficiency step-up DC/DC regulator operated at fixed frequency PWM mode. With an integrated 1.4A MOSFET, it can deliver up to 600mA output current at up to 92% efficiency. The adjustable switching frequency is up to 1.2MHz, making it ideal for DSL applications. When shut down, it draws <1A of current. This feature, along with the minimum starting voltage of 1.8V, makes it suitable for portable equipment powered by one Lithium Ion, 3 to 4 NiMH cells, or 2 cells of alkaline battery. The EL7515 is available in a 10 Ld MSOP package, with maximum height of 1.1mm. With proper external components, the whole converter takes less than 0.25in2 PCB space. This device is specified for operation over the full -40C to +85C temperature range.
Features
* Up to 92% efficiency * Up to 600mA IOUT * 4.5V < VOUT < 17V * 1.8V < VIN < 13.2V * Up to 1.2MHz adjustable frequency * <1A shutdown current * Adjustable soft-start * Low battery detection * Internal thermal protection * 1.1mm max height 10 Ld MSOP package * Pb-Free available (RoHS compliant)
Applications
* 3V to 5V and 12V converters * 5V to 12V converters * TFT-LCD * DSL
Pinout
EL7515 (10 LD MSOP) TOP VIEW
PGND 1 SGND 2 RT 3 EN 4 LBI 5 10 LX 9 VDD 8 FB 7 SS 6 LBO
* Portable equipment * Desktop equipment
Ordering Information
PART NUMBER EL7515IY EL7515IY-T7* EL7515IY-T13* EL7515IYZ (Note) EL7515IYZ-T7* (Note) EL7515IYZ-T13* (Note) e e e BAAAR BAAAR BAAAR PART MARKING PACKAGE 10 Ld MSOP 10 Ld MSOP 10 Ld MSOP 10 Ld MSOP (Pb-free) 10 Ld MSOP (Pb-free) 10 Ld MSOP (Pb-free) PKG. DWG. # MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043
*Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
EL7515 Typical Application
L1 VIN (1.8V TO 9V) C1 10F 1 PGND 2 SGND R3 3 RT 100k 4 EN 5 LBI SS 7 20nF LBO 6 FB 8 C3 LX 10 VDD 9 10H D1 R4 1.4k C4 0.1F R2 82k R1 10k C10 4.7nF C5 22F VOUT (12V UP TO 630mA)
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FN7120.2 August 10, 2007
EL7515
Absolute Maximum Ratings (TA = +25C)
EN, LBI, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+12V LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+18V
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature: . . . . . . . . . . . . . . . . . . . . . +135C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER VIN VOUT IQ1 IQ2 VFB IB DMAX ILIM ISHDN VLBI VOL-LBO ILEAK-LBO rDS(ON) ILEAK-SWITCH VOUT/VOUT fOSC-MAX fOSC1 VHI_EN VLO_EN
VIN = 5V, VOUT = 12V, L = 10H, IOUT = 0mA, RT = 100k, TA = +25C, Unless Otherwise Specified. DESCRIPTION CONDITIONS MIN (Note 1) 1.8 4.5 VEN = 0, feedback resistors disconnected VEN = 2V 1.29 1.4 1.33 TYP MAX (Note 1) 13.2 17 1 2 1.37 0.10 84 1 90 1.4 1 180 ILBO = 1mA VLBI = 250mV, VLBO = 5V at 12V output 220 0.1 0.02 220 1 3V < VIN < 6V, VOUT = 12V, no load IOUT = 50mA to 150mA RT = 49.9k 600 1.6 0.5 0.4 1 1200 670 750 250 0.2 2 UNIT V V A mA V A % A A mV V A m A %/V % kHz kHz V V
Input Voltage Range Output Voltage Range Quiescent Current - Shut-down Quiescent Current Feedback Voltage Feedback Input Bias Current Maximum Duty Cycle Current Limit - Max Peak Input Current Shut-down Input Bias Current LBI Threshold Voltage LBO Output Low LBO Output Leakage Current Switch On Resistance Switch Leakage Current
VOUT/VIN/VOUT Line Regulation Load Regulation Maximum Switching Frequency Switching Frequency EN Input High Threshold EN Input Low Threshold
Pin Descriptions
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 PIN NAME PGND SGND RT EN LBI LBO SS FB VDD LX PIN FUNCTION Power ground; connected to the source of internal N-Channel power MOSFET Signal ground; ground reference for all the control circuitry; needs to have only a single connection to PGND Timing resistor to adjust the oscillation frequency of the converter Chip enable; connects to logic HI (>1.6V) for chip to function Low battery input; connects to a sensing voltage, or left open if function is not used Low battery detection output; connected to the open drain of a MOSFET; able to sink 1mA current Soft-start; connects to a capacitor to control the start-up of the converter Voltage feedback input; needs to connect to resistor divider to decide VO Control circuit positive supply Inductor drive pin; connected to the drain of internal N-Channel power MOSFET
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FN7120.2 August 10, 2007
EL7515 Block Diagram
VOUT 82k 10k 4.7nF 1.4k 0.1F 22F 10F 10A VIN
FB
VDD
LX
MAX_DUTY RT 100k REFERENCE GENERATOR VREF VRAMP PWM COMPARATOR
THERMAL SHUT-DOWN
PWM LOGIC
0.2
EN LBO 12A LBI
+
START-UP OSCILLATOR
+ ILOUT 7.2k 80m
220mV SGND SS 20nF PGND
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FN7120.2 August 10, 2007
EL7515 Typical Performance Curves
92 90 EFFICIENCY (%) EFFICIENCY (%) 88 86 84 82 80 78 76 0 50 100 150 200 250 300 350 IOUT (mA) VIN = 3.3V, VO = 12V 92 90 88 86 84 82 80 0 100 200 300 400 500 600 700 IOUT (mA) VIN = 3.3V, VO = 5V
FIGURE 1. EFFICIENCY vs IOUT
FIGURE 2. EFFICIENCY vs IOUT
94 92 EFFICIENCY (%) 90
VIN = 5V, VO = 12V
2.2 2.1 2 IDD (mA) 1.9 1.8 1.7 1.6 1.5
VDD = 10V, VO = 12V TO 17V
88 86 84 82 80 78 0 100 200 300 IOUT (mA) 400 500 600
1.4 650
750
850
950 FS (kHz)
1050
1150
1250
FIGURE 3. EFFICIENCY vs IOUT
FIGURE 4. IDD vs FS
1400 1200 1000 FS (kHz) 800 600 400 200 0 5 6 7 8 9 10 11 12 VDD (V) RT = 200k RT = 100k RT = 51.1k RT = 71.5k
1400 1200 1000 FS (kHz) 800 600 400 200
VDD = 10V
0 50
100 RT (k)
150
200
FIGURE 5. FS vs VDD
FIGURE 6. FS vs RT
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FN7120.2 August 10, 2007
EL7515 Typical Performance Curves
VIN = 5V, VO = 12V, IO = 30mA VIN
(Continued)
VIN = 5V, VO = 12V, IO = 300mA
VIN VLX
50mV/DIV
50mV/DIV
10V/DIV
VLX VO IL
10V/DIV 20mV/DIV 0.5A/DIV
VO IL
20mV/DIV 0.5A/DIV 0.5s/DIV
0.5s/DIV
FIGURE 7. STEADY STATE OPERATION (INDUCTOR DISCONTINUOUS CONDUCTION)
FIGURE 8. STEADY STATE OPERATION (INDUCTOR CONTINUOUS CONDUCTION)
VIN = 5V, VO = 12V, IO = 300mA
VIN = 5V, VO = 12V, IO = 50mA TO 300mA
2V/DIV 5V/DIV VIN VO 0.5A/DIV IL IO VO 100mA/DIV 0.5V/DIV
0.5ms/DIV
0.2ms/DIV
FIGURE 9. POWER-UP
FIGURE 10. LOAD TRANSIENT RESPONSE
Applications Information
The EL7515 is a step-up regulator, operated at fixed frequency pulse-width-modulation (PWM) control. The input voltage is 1.8V to 13.2V and output voltage is 4.5V to 17V. The switching frequency (up to 1.2MHz) is decided by the resistor connected to RT pin. capacitor. This in turn controls the rising rate of the output voltage. The regulator goes through the start-up sequence as well after the EN signal is pulled to HI.
Start-Up
After VDD reaches a threshold of about 1.7V, the start-up oscillator generates fixed duty-ratio of 0.5 to 0.7 at a frequency of several hundred kilohertz. This will boost the output voltage. When VDD reaches about 3.7V, the PWM comparator takes over the control. The duty ratio will be decided by the multiple-input direct summing comparator, Max_Duty signal (about 90% duty-ratio), and the Current Limit Comparator, whichever is the smallest. The soft-start is provided by the current limit comparator. As the internal 12A current source charges the external CSS, the peak MOSFET current is limited by the voltage on the 6
Steady-State Operation
When the output reaches the preset voltage, the regulator operates at steady state. Depending on the input/output conditions and component values, the inductor operates at either continuous-conduction mode or discontinuous-conduction mode. In the continuous-conduction mode, the inductor current is a triangular waveform and LX voltage a pulse waveform. In the discontinuous-conduction mode, the inductor current is completely dried out before the MOSFET is turned on again. The input voltage source, the inductor, and the MOSFET and output diode parasitic capacitors form a resonant circuit. Oscillation will occur in this period. This oscillation is normal and will not affect the regulation.
FN7120.2 August 10, 2007
EL7515
At very low load, the MOSFET will skip pulses sometimes. This is normal. The inductor has peak and average current decided by Equations 4 and 5:
I L I LPK = I LAVG + -------2 IO I LAVG = -----------1-D (EQ. 4)
Current Limit
The MOSFET current limit is nominally 1.4A and guaranteed 1A. This restricts the maximum output current IOMAX based on Equation 1:
V IN I L I OMAX = 1 - -------- x -------- 2 VO (EQ. 1)
(EQ. 5)
where: * IL is the inductor peak-to-peak current ripple and is decided by Equation 2:
V IN D I L = --------- x ---L fS (EQ. 2)
The inductor should be chosen to be able to handle this current. Furthermore, due to the fixed internal compensation, it is recommended that maximum inductance of 10H and 15H to be used in the 5V and 12V or higher output voltage, respectively. The output diode has an average current of IO, and peak current the same as the inductor's peak current. A Schottky diode is recommended and it should be able to handle those currents. The output voltage ripple can be calculated as Equation 6:
* D is the MOSFET turn-on ratio and is decided by Equation 3:
V O - V IN D = ----------------------VO (EQ. 3)
IO x D V O = --------------------- + I LPK x ESR FS x CO
(EQ. 6)
* fS is the switching frequency The following table gives typical values:
TABLE 1. MAX CONTINUOUS OUTPUT CURRENTS VIN (V) 2 2 2 3.3 3.3 3.3 5 5 9 12 VO (V) 5 9 12 5 9 12 9 12 12 15 L (H) 10 10 10 10 10 10 10 10 10 10 FS (kHz) 1000 1000 1000 1000 1000 1000 1000 1000 1000 100 IOMAX (mA) 360 190 140 600 310 230 470 340 630 670
Where: * CO is the output capacitance. * The ESR is the output capacitor ESR value. Low ESR capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are preferred for the output capacitors since they have a low ESR and small packages. Tantalum capacitors also can be used, but they take more board space and have higher ESR. A minimum of 22F output capacitor is sufficient for high output current application. For lower output current, the output capacitor can be smaller, like 4.7F. The capacitor should always have enough voltage rating. In addition to the voltage rating, the output capacitor should also be able to handle the RMS current which is given by Equation 7:
2 I L 1 ( 1 - D ) x D + ------------------- x ----- x I LAVG 2 12 I LAVG
I CORMS =
(EQ. 7)
Component Considerations
It is recommended that CIN is larger than 10F. Theoretically, the input capacitor has a ripple current of IL. Due to high-frequency noise in the circuit, the input current ripple may exceed the theoretical value. A larger capacitor will reduce the ripple further.
Output Voltage
An external resistor divider is required to divide the output voltage down to the nominal reference voltage. The current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network less than 300k is recommended.
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FN7120.2 August 10, 2007
EL7515
The boost converter output voltage is determined by the relationship in Equation 8:
R 2 V OUT = V FB x 1 + ------ R 1 (EQ. 8)
Layout Considerations
The layout is very important for the converter to function properly. Power Ground ( ) and Signal Ground ( ) should be separated to ensure that the high pulse current in the Power Ground never interferes with the sensitive signals connected to Signal Ground. They should only be connected at one point. The trace connected to pin 8 (FB) is the most sensitive trace. It needs to be as short as possible and in a "quiet" place, preferably between PGND or SGND traces. In addition, the bypass capacitor connected to the VDD pin needs to be as close to the pin as possible. The heat of the chip is mainly dissipated through the SGND pin. Maximizing the copper area around it is preferable. In addition, a solid ground plane is always helpful for the EMI performance. The demo board is a good example of layout based on these principles. Please refer to the EL7515 Application Brief for the layout. http://www.intersil.com/data/tb/tb429.pdf
where VFB slightly changes with VDD. The curve is shown in this data sheet.
RC Filter
The maximum voltage rating for the VDD pin is 12V and is recommended to be about 10V for maximum efficiency to drive the internal MOSFET. The series resistor R4 in the RC filter connected to VDD can be utilized to reduce the voltage. If VO is larger than 10V, then Equation 9 shows:
V O - 10 R 4 = -------------------I DD (EQ. 9)
where IDD is shown in IDD vs fS curve. Otherwise, R4 can be 10 to 51 with C4 = 0.1F.
Thermal Performance
The EL7515 uses a fused-lead package, which has a reduced JA of +100C/W on a four-layer board and +115C/W on a two-layer board. Maximizing copper around the ground pins will improve the thermal performance. This chip also has internal thermal shut-down set at around +135C to protect the component.
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FN7120.2 August 10, 2007
EL7515 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 9
FN7120.2 August 10, 2007

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